Home
News
Problems
FAQ
Registration
Winners
History
Contact
Contest Problems
Problem A
Hardware Trojan Detection on Gate Level Netlist
*last update 07/29
(
Q&A
)
*last update 08/15
(
Trojan Definition
)
*last update 04/26
(
testcase
)
*last update 07/29
(
alpha test result
)
*last update 08/09
(
beta test result
)
*last update 08/09
(Cadence Design Systems, Inc.)
Problem B
Power and Timing Optimization Using Multibit Flip-Flop
*last update 08/21
(
Q&A
)
*last update 08/21
(
alpha test result
)
*last update 07/18
(
parse_report_qor_summary.py
)
*last update 08/15
(
public_cost.tcl
)
*last update 08/15
(
parse_report_power.py
)
*last update 08/15
(
the compatible cell list
)
*last update 08/14
(
beta test result
)
*last update 08/21
(Synopsys, Inc.)
Problem C
Incremental Placement Optimization Beyond Detailed Placement:Simultaneous Gate Sizing, Buffering, and Cell Relocation
*last update 07/24
(
Q&A
)
*last update 08/19
(
testcase
)
*last update 05/06
(NVIDIA Research)
Please
read FAQs
for more information, or
contact us
for any further question.
Copyright © 2025 CAD Contest. All Rights Reserved.
